A digital storage oscilloscope operates by digitizing an input signal in response to a sampling clock which operates at a constant rate, thereby generating a sequence of sample values, and storing the sample values in a display memory. The display memory is able to store only a limited number of sample values, e.g. 1024. In order to enable the oscilloscope to acquire signals containing high frequency components, the digitizer is designed to be able to sample the input signal at a high sampling rate, e.g. 100 MHz. At a 100 MHz sampling rate, 1024 sample values are generated in about 10 .mu.s. However, the user of the oscilloscope might need to be able to acquire an input signal over a time period that is much longer than 10 .mu.s, and if only 1024 sample values can be stored this implies that the effective sampling rate must be reduced, e.g. to 10 MHz. This may be accomplished by using a separate recording clock to control writing of the sample values into the display memory. If the sampling clock rate is 100 MHz and the display clock rate is 10 MHz, the recording clock causes every tenth sample value to be written into the display memory, the other nine sample values being discarded.
If the frequency components of the input signal are all less than half the frequency of the recording clock, the waveform of the input signal can be accurately reconstructed from the stored ensemble of decimated sample values. However, if the input signal has frequency components that are higher than half the frequency of the recording clock, the input signal is aliased when it is written into the display memory and its waveform cannot be reconstructed from the decimated sample values. Even when the input signal is aliased, the envelope of the input signal conveys valid, and useful, information. A method for preserving the envelope of the waveform is to store the maximum and minimum sample values between recording events. However, the conventional digital storage oscilloscope does not provide any means for determining whether the input signal is in fact aliased.
It is known to use the envelope mode of data acquisition to record valid information concerning an input signal that is aliased. As described in U.S. Pat. No. 4,271,486 issued Jun. 2, 1981 (D'Agostino et al), two sample values are stored for each recording clock pulse. These two sample values are the maximum sample value and the minimum sample value occurring within the preceding recording clock period. The contents of the display memory are used to provide a display of the envelope of the input signal.
U.S. Pat. No. 4,039,784 issued Aug. 2, 1977 (Quarton et al) discloses a digital minimum/maximum vector CRT display in which minimum and maximum sample values are identified during a recording clock period. A determination is made as to which of the identified sample values is more relevant, and the more relevant sample value is stored. A determination is also made as to whether the less relevant sample value should be retained and, if so, it is stored during the next recording clock period.
U.S. Pat. No. 4,143,365 issued Mar. 6, 1979 (Cayzac et al) discloses a device for the acquisition and storage of an electrical signal. The waveform epoch of the signal is divided into elementary time intervals, and during each interval the maximum and minimum amplitude values of the signal are determined. These maximum and minimum amplitude values are stored.